• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    An electric DC-AC power converter according to the invention comprises an inverter (2) and an AC filter (L f, C f), wherein the AC filter (L f, C f) between the phase terminals (I1, I2, I3) of the Inverter (2) and the load terminals (L1, L2, L3) is arranged and output capacitors (C f) in a star configuration with a neutral point (X), with a star point (X) and one of the DC terminals of the inverter (2) connecting balance current path, comprising. A common mode regulator (5) is designed to generate a common mode voltage reference to compensate for load power oscillations occurring at the load terminals (L1, L2, L3) and combining either the common mode voltage reference with a voltage setpoint for controlling a switching operation of the inverter (2), or the common mode voltage reference is used as a setpoint value for controlling a voltage source (6) arranged in the equalization path.
    公开号:CH713936A2
    申请号:CH00785/17
    申请日:2017-06-16
    公开日:2018-12-28
    发明作者:Miric Spasoje；Tüysüz Arda；Walter Kolar Johann
    申请人:Eth Zuerich；
    IPC主号:
    专利说明:

    Description [0001] Power pulsation buffers are commonly used in single-phase, DC-to-AC converters (single-phase inverters) that are powered by a DC voltage power source, e. As a photovoltaic panel (PV) or batteries, are fed. Since multiplying a sinusoidal waveform with another sinusoidal waveform having the same frequency results in the superposition of a DC term with a third sinusoidal waveform of twice the frequency, the AC side power of single-phase inverters has a DC component (average power) and a component which oscillates at twice the output voltage frequency. Of course, this power pulsation is also visible in the DC source power if there is no power cache in the inverter. Power oscillation on the DC side is generally undesirable because it accelerates the aging of the batteries or prevents pursuit of the peak of maximum power in PV systems. Thus, any instantaneous power oscillation on the AC side of the inverter must be decoupled from the DC side.
    One way to accomplish this pulsation decoupling is to provide a power buffer that is charged and discharged with excess / deficit power, which can be defined as the difference in instantaneous AC page power and average AC page power. In this case, the DC side power is constant and equal to the average AC side power (inverter losses are neglected to simplify this description). One way to achieve this is to use capacitors on the DC side of the inverter, but this solution would result in a large volume of these capacitors, since the allowable voltage variation on the DC side is usually limited, which is the strength limited by the Leistungspulsierens, which can buffer a given capacitor. Another possibility would be to build a dedicated power buffer, i. an auxiliary converter on the DC side of the inverter. This auxiliary converter can be built as a DC-DC converter, which serves as an interface between an auxiliary capacitor bank and the DC side of the main converter, where the voltage of the auxiliary capacitors can have a large lift around the power that can be buffered by the auxiliary capacitor bank to maximize [Neumayr]. The disadvantage of such systems is that additional power electronics are required, which increases cost and complexity and degrades the reliability of the system. [Serban] proposes an alternative power pulsation buffer that does not require additional power electronics. This is accomplished by modifying the control scheme of a single phase inverter to use the capacitors of the AC side filter as the energy store.
    Three-phase inverters, which are loaded with symmetrical three-phase loads, have a constant output power; thus the DC side power does not contain any pulsation. Therefore, in this case, there is no need for the above-mentioned power decoupling. However, there are some applications where a three-phase inverter is also subject to power pulsation. An example is inverters that drive electric machines with torque oscillations at constant speed (speed). Another common example is unbalanced three-phase loads. The power pulsing in these examples spreads to the DC side if no precautionary measures are taken.
    [Neumayr] D. Neumayr, D. Bortis, JW Kolar, "Ultra Compact Power Pulsation Buffer for Single-Phase DC / AC Converter Systems", in Proceedings of the 8th International Power Electronics and Motion Control Conference, Hefei, China, May 22 -25, 2016.
    [Serban] I. Serban, "Power Decoupling Method for Single-Phase H-Bridge Inverters With No Additional Power Electronics", in IEEE Transactions on Industrial Electronics, voi. 62, no. 8, pp. 4805-4813, Aug. 2015.
    Therefore, the object of this invention is to provide a power converter for decoupling power oscillations in a three-phase inverter.
    The object is achieved by a power converter according to the patent claims.
    The power converter uses a common mode path of the inverter output filter as an energy storage, thus performing power decoupling on the AC side. The common mode power is controlled by the common mode voltage of the inverter and there is no need for extra power electronics. However, if the common mode voltage is insufficient to store enough energy in the AC side filter capacitors (in cases where the ratio of the DC voltage to the AC voltage is low), an additional, low cost, low power auxiliary converter can be used to produce the required common mode voltage.
    The invention will be described in detail below by means of embodiments which are illustrated in the attached figures:
    Fig. 1 Three-phase inverter with unbalanced load and the proposed decoupling control process through the common mode path (the path formed by connecting the X and Y nodes).
    FIG. 2 shows the common mode equivalent circuit obtained by connecting the nodes X and Y of the inverter system of FIG
    Fig. 1 is formed.
    Fig. 3 Current performances; Pm (t) - instantaneous three-phase power of the load 3 of Fig. 1; pDC (t) - instantaneous power of the DC source 1 of Fig. 1; p0 (t) - instantaneous calculated common mode power at the output terminals 10, 11, 12, 13 of the inverter 2 of FIG. 1.
    Fig. 4 decoupling power oscillations using an auxiliary converter 6 for controlling the common mode voltage v0.
    In Fig. 1 and Fig. 4, there is shown a DC-AC electric power converter including an inverter 2 and an AC filter Lf, Cf. The inverter 2 includes a positive DC terminal I + and a negative DC terminal I- and phase terminals 11, 12, 13 and switches S1-S6 in a bridge configuration. The AC filter is arranged between the phase terminals 11, 12, 13 and the load terminals L1, L2, L3, each phase having a series inductance Lf and output capacitors Cf in a star configuration with a star point X, respectively. A compensating current path connects the neutral point X and one of the DC terminals, in this case at point Y. The power converter can be connected to a DC source 1 on the DC side and to a polyphase load on the AC side, each having phase resistances Rm1 , Rm2, Rm3, inductances Lm1, Lm2, Lm3, and voltage sources em1, em2, em3.
    A main controller 4 according to the prior art is designed to generate an inverter control reference vdi * for controlling output voltages ΐ of the converter to follow an output voltage reference rj *. This is done by means of a first PI controller P11, which takes as an input the difference between the output voltage reference% '· and the measured output voltage ΐ and determines the reference value for the current through the capacitor Cf. The measured load current is added to this value and the inverter output current reference% is determined (im1, im2, im3 are measured and transformed to their designated as. This transformation is omitted in the figure as it is well known). The measured value of this current, c "(currents h, i2, i3 are measured and their Λ / transformed, which is accordingly referred to as; dt |) is subtracted and subjected to the regulator P12, which determines the reference voltage across the inductors Lf. The measured voltage across the output capacitors c is added to this value and the inverter output voltage reference "is determined.
    Decoupling load power oscillations from the DC side in a three-phase inverter system is shown in FIG. In this system, the voltage at the output capacitors Cf, i. the potentials vm1, vm2 and vm3 with respect to the neutral point X of the output capacitor are controlled by a main controller 4. Since the three-phase system can be fully described with only one vector in </> / space, these voltages are referred to as "£" and the main controller 5 is implemented to control the d and q components of these voltages (as with practical ones) Control of power electronics is well known, usually two independent controllers for d and q axes are used, the figure shows only one controller acting on both the d and q axes). The same notation convention applies to the three-phase currents in the system. The notation of the transformation from abc to <* / - values and vice versa is omitted in the figure, since it is well known.
    The load 3 has an instantaneous power, which oscillates, which is indicated in Fig. 1 by arrows. The instantaneous total power of the load is equal to the sum of the two components: Pm + APm (t). The first component Pm is time constant and the second APm (t) represents the power oscillation at the load. The common mode current flowing in the wire connecting nodes X and Y (referred to as i0 in FIG. 1) is controlled such that the power of the DC source 1 is constant and equal to the constant component of the instantaneous load power Pm. The power at the inverter output terminals 11, 12, 13 is equal to the sum of two powers, the power of the load and the power in the common mode equivalent circuit shown in FIG. In order to obtain a constant power of the DC source 1, that is, the constant power at the inverter input terminals I + and I- (see Fig. 1), the inverter output should be constant. It follows that the power of the common mode circuit is equal to -APm (t), so that the load power oscillation is balanced by the power from the common mode circuit.
    The common mode controller 5 in Fig. 1 controls the power of the common mode circuit. Their inputs are the connections 5T1, 5T2 and 5T3. Terminal 5T4 is the output and it is the reference for the common mode voltage v; of the inverter 2. The first part of the common mode controller 5 is for estimating the power of the load. This is calculated in block 55 using the input signals 5T1 and 5T2, which represent the references of the load current and the load voltage c1-. The estimated power p, -,> is then inverted in the inverter 56 and subjected to the high-pass filter 51. The output signal -w, of the high-pass filter 51 represents the negative oscillation component of the load line. This signal is further divided in block 57 by half the voltage of the DC link 0.5 VDC. The output of the block 57 is the high frequency part of the common mode current reference. The low frequency part of the common mode current reference signal is referred to as î;, lf and is used to hold the DC component on the common mode voltage equal to 0.5 VDc · The reference signal is obtained by using the signal from the input 5T3 , which is the common-mode voltage v0 at the output of the inverter in FIG. v0 in the corresponding common mode equivalent circuit is shown in FIG. This voltage is calculated using the voltage measurement at the output of the inverter where the potentials νΊ, v2 and v3 are measured relative to the node Y = X, and the common mode voltage is given as: v0 = (νΊ + v2 + v3) / 3 , This signal is then subjected to the low-pass filter 53 in Fig. 1, which outputs at its output the DC component, referred to as v0.Lf. This signal is then subtracted from 0.5 VDC and subjected to the PI controller 54 in FIG. The output of this regulator is the low frequency component of the common mode current reference which ensures that the DC component is equal to 0.5 VDC. The total reference for the common mode current is obtained by adding the two parts of the reference and. Upon further processing, the common mode total current reference is compared with the actual common mode current i0 (that is, the actual common mode current is subtracted from the common mode total current reference) and then subjected to the PI controller 52 in FIG. The output of the regulator 52 in FIG. 1 is the reference signal for the common-mode voltage of the inverter 2 in FIG. 1.
    In Fig. 3, the power waveforms are shown with and without the proposed power decoupling. The situation in which there is no power decoupling is shown in Fig. 3, that is, there is no control part 5 in Fig. 1 and = 1/2 VDc. In this case there is no power decoupling and the power oscillations from the load 3 in Fig. 1 propagate to the DC source, i. PDC (t) = Pm (t). The common mode power is zero. The load line oscillations may occur (if the load is an electric machine) due to torque oscillations of an electric machine or unbalanced load. In the case of an unbalanced load, the frequency of the power oscillation is equal to twice the fundamental frequency of the system. In Fig. 3b, the controller 5 of Fig. 1 in use. In this case, the common mode power balances the load power oscillations and the DC source power remains constant.
    The limits of the above regulation relate to the voltage range available for generating the desired common mode voltage. This range is limited by the DC link voltage VDC and the desired phase voltage at the output of the inverter 2 of FIG. 1:
    ^ 1-X + VQ <IZDC
    P2-X + Vo <VpC V3_x + VQ <VDC.
    In the case where a sufficient common mode voltage can not be generated with the inverter 2 of Fig. 1, as shown in Fig. 4, an auxiliary inverter 6 can be used. The auxiliary converter 6 is arranged to generate a voltage between the nodes X and Y. The inverter 1 of FIG. 4 controls only the phase voltages vm1, vm2 and vm3 with respect to the node X without adding thereto. The voltage source of the auxiliary converter 6 of FIG. 4 receives its voltage reference from the voltage reference signal v'o from the common mode regulator 5 in FIG. 4, which is the same as the common mode regulator 5 in FIG.
    In other embodiments, having the same structure as FIG. 4, the auxiliary inverter 6 functions as explained above, and the inverter 2 is controlled to add another common-mode voltage. This further common mode voltage is not used for power buffering for power pulsations, but for achieving a higher output voltage.
    In other embodiments, the regulators determine a desired common mode voltage that includes a power buffer component and a component for achieving a higher output voltage. The regulators share the generation of the common mode voltage across the inverter 2 and the auxiliary inverter 6.
    权利要求:
    Claims (2)
    [1]
    claims
    An electric DC-AC power converter comprising an inverter (2) and an AC filter (Lf, Cf), the inverter (2) comprising: a positive DC terminal (l +) and a negative DC terminal ( I-) and phase terminals (11, 12, 13), wherein the AC filter is arranged between the phase terminals (11, 12, 13) and the load terminals (L1, L2, L3) and output capacitors (Cf) in a star configuration with a Star point (X), a balancing current path connecting the neutral point (X) and one of the DC connections, a main controller (4) being designed to generate an inverter control reference (vdw) for regulating output voltages rfi of the converter for following an output voltage reference (4 "). a common-mode regulator (5) is designed to generate a common-mode voltage reference w) for generating a common-mode power flow into the inverter (2) which compensates for load power oscillations occurring at the load terminals ( L1, L2, L3), and either the inverter control reference (^-) and the common-mode voltage reference ") are combined and this combination is used as a command value for controlling the switching operation of the inverter (2), or the inverter control reference (v" w) is used as a target value for controlling the switching operation of the inverter (2) and the common-mode voltage reference w is used as a target value for controlling a voltage source (6) arranged in the equalizing current path.
    [2]
    The power converter of claim 1, wherein the common mode regulator (5) is adapted to generate the common mode voltage reference M) from a total reference for a common mode current, this total reference being the sum of a high frequency portion and a low frequency portion, the high frequency portion of the common mode voltage reference being an estimate of an oscillating power component )) Of a power flow at the load terminals (L1, L2, L3), and the low frequency part of the common mode current reference is determined to balance a DC component of the common mode voltage.
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    同族专利:
    公开号 | 公开日
    CH713936B1|2021-01-29|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2022-01-31| PL| Patent ceased|
    优先权:
    申请号 | 申请日 | 专利标题
    CH00785/17A|CH713936B1|2017-06-16|2017-06-16|Electric DC to AC power converter.|CH00785/17A| CH713936B1|2017-06-16|2017-06-16|Electric DC to AC power converter.|
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